Unim Innovation Technology (Wuxi) Co.,Ltd.

Benefits

1. Social insurance and housing fund.
2. Annual health check and supplementary medical insurance, annual leave and additional paid leave.
4. Team building, welfare, birthday celebration.
5. Performance awards and stock options.
6. Training and promotion opportunities.
7. Free staff dormitory (Wuxi)
8. Gym and recreation area (Wuxi and Shanghai office)
9.Complimentary breakfast, afternoon tea, fruit of the day

Job Search

Please submit your resume to our HR, email: hr@unimcom.com

Position Location Department View

NCG CAD engineer Campus Recruitment,Shanghai Research and Development

Work City

ShangHai

Job Responsibilities:
1. Develop and support the company's internal analog or digital design process
2. Cooperate with company IT to support Linux environment and version control tool
3. Use scripting language to develop in house scripts and tools
4. Evaluation and testing of EDA tools.

Qualifications:
1. Bachelor degree or above in microelectronics/computer/automatic control, or semiconductor design knowledge
2. Familiar with Cadence Virtuoso/Mentor Calibre/Synopsys and other tools and design processes
3. Familiar with LINUX/UNIX system and common tools
4. Familiar with a scripting language
5. Good oral and written English, communication and problem solving skills

Layout design engineer Campus Recruitment,Shanghai Research and Development: Work City
ShangHai

Job Responsibilities:
1. Provide the overall design requirements of chips and modules to complete the overall Floorplan
2. Complete the layout design of block level and Top level according to the design rules and circuit requirements
3. Completed module and chip layout design verification, including LVS, DRC, ANTENNA, PERC, etc
4. Generate Abstract and LEF and other relevant documents
5. Extract parasitic parameters and assist circuit engineers to complete post-imitation
6. Assist APR engineer to complete SOC chip integration
7. Generate tape-out related data and files
8. Write relevant layout documents

Qualifications:
1. Bachelor degree or above in microelectronics, electronic engineering or related field, or knowledge of semiconductor design
At least 2 years analog and mixed signal layout working experience
3. Familiar with IC design process, and have certain basic knowledge of semiconductor devices and analog circuit
4. Proficient in IC layout design and validation tools (Cadence, Calibre, etc.)
5. skilled use of Virtuoso-XL is preferred
6. Have Flash/SRAM/ROM Memory layout experience is preferred
7. Familiar with SKILL/TCL, APR working experience is preferred

Analog circuit design engineer Campus Recruitment,Shanghai Research and Development

Work City
ShangHai

Job Responsibilities:

1. Responsible for chip analog circuit design and simulation
2. Responsible for chip data path and IO design
3. Guided layout engineers to carry out layout planning, layout performance improvement and mold size optimization
Design and verify test circuits according to process and product silicon test requirements
Support post-Silicon testing and debugging

Qualifications:
1. Bachelor degree or above, majored in microelectronics or related, or have knowledge of semiconductor design courses
2. Proficient in HSPICE, Nanosim and other simulation tools
3. Experience in ADC/DAC/LDO/PUM/IO is preferred

Digital design and validation engineer Campus Recruitment,Shanghai Research and Development: Work City
ShangHai

Job Responsibilities:
1. Participated in the development, design and verification of Flash products, mainly responsible for the design of logic parts and chip verification
2. Define design and implementation specifications according to customer functional requirements
3. Implement mod-level Verilog, system Verilog model and firmware coding
4. Build integrated chip mixed signal simulation environment and test platform
5. Develop verification scripts and test programs according to design requirements
6. Participate in the debugging of Silicon problems

Qualifications:
1. Familiar with digital process, able to write RTL code and simulation in digital front-end design independently
2. Bachelor degree or above in microelectronics or related field, digital logic design and validation experience is preferred, or semiconductor design course knowledge is preferred
3. Familiar with RTL coding, Verilog simulation and Synthesis tools
4. Understand the full custom chip design process and be familiar with cadence's Virtuoso design environment
5. Experience in FLASH memory circuit design is preferred

Digital design and validation engineer Social Recruitment,Shanghai Research and Development: Work City
ShangHai

Job responsibilities
1. Participated in the development, design and verification of Flash products, mainly responsible for the design of logic parts and chip verification
2. Define design implementation specifications according to customer functional requirements
3. Implement module-level Verilog, system Verilog model and firmware coding
4. Build a mixed-signal simulation environment and test platform for integrated chips
5. Develop verification scripts and test programs according to design requirements and participate in silicon problem debugging

qualifications
1. Familiar with digital process, able to write RTL code and simulation in digital front-end design independently
2. Master degree or above in microelectronics or related field, 2-3 years digital logic design and validation experience is preferred
3. Familiar with RTL coding, Verilog simulation and Synthesis tools
4. Familiar with full custom chip design process, familiar with Cadence Virtuoso design environment
5. Experience in FLASH memory circuit design is preferred

Analog circuit design engineer Social Recruitment,Shanghai Research and Development: Work City
ShangHai

Job Responsibilities:
1. Responsible for chip analog circuit design and simulation
2. Responsible for chip data path and IO design
3. Guide layout engineers to plan layout, improve layout performance and optimize mold size
Design and verify test circuits according to process and product silicon test requirements
5. Support post-Silicon testing and debugging

Qualifications:
1. Master degree or above in microelectronics or related field
2. Proficient in HSPICE, Nanosim and other simulation tools
3. Experience in ADC/DAC/LDO/PUM/IO is preferred